User:RHansen
Jump to navigation
Jump to search
| Real name: | Ronny Hansen |
| Role: | Developer, Architect, Geek |
| Interrested in: | Everything between Embedded and Cloud |
A long time ago, in another universe it seems, I was using SINTRAN on an ND-100 at our electronics/computer school. We configured and ran the machine after we inherited it.
These days I am a Cloud Architect, Developer and Geek - and the last years I have been spending an unhealthy amount of time writing emulators. You can read how this crazy journey started here [1]
ND-100 Emulator
I have successfully (with some help) created an ND-100 emulator in .NET/C# with peripherals such as TeleType, Floppy and HardDrive. (I have to admit I have borrowed some of the complex opcodes from the existing nd100em emulator )
The emulator contains a debugger, disassembler and code tracer in addition to logic to mount different floppy-image, read/write hardddrive, loading BPUN and PROG files directly into memory.
I have successfully dumped and booted SINTRAN version H in ND-100 mode, although there are still some bugs to iron out.
I have tried booting SINTRAN K, L and M. Dumping to HDD works great, but I haven't successfully managed to boot SINTRAN from HD with 22! If using DISK-75MB-1, I am actually able to make SINTRAN start. However it fails after a while with a
What's working in the ND-100 emulator
- SINTRAN H boots and runs (with a minor hardcode in the emulator to fix ABSTR bug (?))
- Test programs that validates the opcodes so far
- ONE—CHECK, TWO—CHECK, THREE—CHECK
- FOUR—CHECK (a few bugs still)
- INSTRUCTION-B.BPUN (PROGRAM NUMBER: 204384B DATE ISSUED : 83.11.01)
- PAGING-B.BPUN (PROGRAM NUMBER: 203098B 1982)
- FLOPPY-FU-1986F (All tests work except Test 2 "Format Decoder Test" on my PIO floppy driver)
- Test programs on floppy "210523E00-XX-01D"
- INSTRUCTION - Version: C00 - 1986-10-30
- "48 BITS FLOATING INSTRUCTIONS" - not working as I am only emulating 32 bits FPU
- PAGING - Version: C00 - 1986-10-16
- All tests report success in MMS-1 and MMS-2 mode.
- INSTRUCTION - Version: C00 - 1986-10-30
What's NOT working in the ND-100 emulator
- SINTRAN K,L and M doesn't boot fully yet.. There are some page-table mappings that fail with memory exception, and SINTRAN ends up looping. I am guessing the bug is related to memory access or interrupt handling, but so far, I haven't been able to track down the bug.
- MON 131 ABSTR behaves "buggy" in SINTRAN H
- Something odd happens with zero-pointers for some logical devices sending the CPU into a loop at P=0
- Odd behavior in CONFIGURATION on interrupt detection (see picture on the right)
- Copying file from papertape driver to SINTRAN disk with "COPY 'FILE:BPUN' PT1' fails after 129 bytes. It just stops, and I have to cancel the copy with ESC key.
I am looking for the following
- Images of SINTRAN J floppies. The source code that has been scanned is SINTRAN J.
- Other binary images (Tape, PaperTape, HDD, Floppy,+++) All SINTRAN III versions are of interrest.
- Source Code. Any source code. Especially test programs and IO drivers.
- Documentation on Date/Time format/calculation for file/timestamps
- Hard Disk boot sector information - currently I must boot from via "boot floppies" and I would like to be able to boot directly from the HDD.
- Starting to get a grip on this, as there is some documentation in the microcode. I have understood floppy-boot, working on understanding HDD boot (or maybe I just need a bootable HD)
Things I am working on
- After getting the source code for SINTRAN L, I am now focusing on getting version L to boot to login prompt.
- Dumping to DISK-75MB-1 works great. Boot startes and runs around 2.5 million instructions before it hangs.
- Currently stuck on a page-fault in a none-demand segment after SINTRAN starts the RT system. SINTRAN Segment Administration on Level 3 tries to give it a PageTable setting, but can't. It then restarts the process, and we have a never-ending loop.
- JMP 042314 = ESCER => Page Fault! PT=9 VPN=17 PTe=00000000 Accessmode=FETCH PGS=141121
- Getting the I/O devices to work flawlessly. Normal read/write works in my drivers, but test-programs are not working 100% as they are enabling "test mode" which I havent implemented (yet).
- I am focusing on getting the ND-10/ND-100 opcodes working 100%. (I do believe that the ones that are implemented are "almost" bugfree)
- Implementing the missing opcodes
- «Commercial Extended» (CE) option (BCD)
- CX opcodes (Stack, Segment,)
- ND-110 Specific opcodes
- Since I now have the ND-110 emulator working, I should be able do decode how the missing opcodes work and get them working.
- Focusing on getting SINTRAN H work 100% flawlessly (could be opcodes, but at the moment all my trouble is inside MON 131 ABSTR)
ND-100 Running in the browser
- Working on making the emulator(s) working in the browser by compiling C# to WebAssembly
- CPU is running nicely, working on giving access to IO devices
- You can test by going to https://retrocore.hackercorp.no/ and selecting machine=ND100 then powering on the Emulator.
- Feedback, comments, and help is much appreciated
Open Source
- When I have a stable working version, I am planning to put the source code on GitHub under a BSD License. Then everyone can look at the code, modify it or just run it.
- I have been playing with the idea on porting my C# code to C - when its stable. And integrate it in the SIMH projects [2]. For this I may need help :)
ND-110 Emulator
- ND-110 MicroCode CPU
- Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator
- Everything is written in C#/.NET7
- MicroCode compiler works.
- MicroCode retrieved from PDF document using OCR techniques mixed with some "text washing" gives me a file with 16600 lines of microcode I manually have validate against the PDF. After retriving a copy of a ROM for a ND-110 cpu board, I could compare the compiled result with the ROM and found 150+ errors in the source file. Now that is fixed, and the compiled microcode is identical to the ROM.
- MicroCode CPU working. I have implemented registers, ALU (really 4x Am2901 chips) and interrupts (Am2914 chip)
- The remaining parts are to get the interrupt subsystem 100% correct, then add memory management and implement Traps.
- I am looking for more information that explains the Trap handling.
- Macro code execution works, except interrupts and traps.
- This CPU is definitively slower than the ND-100 emulator, but hopefully behave 100% like the original. This way I can verify behavior differences between the ND-100 opcodes and the ND-110 opcodes.
- If you want to test the emulator/debugger, its available at https://nd110.hackercorp.no/
- Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator
ND-120 Emulator
- ND-120 FPGA CPU
- Creating a new CPU emulator at hardware level using the original design documents from 1988
- Draw the digital logic using Logisim Evolution.
- Done with CGA (CPU Gate Array)
- Started on DGA (Decoder Gate Array)
- Remaining: PCB, PAL's and some special chips (like the UART).
- I have secured a dump of the microcode from EPROM on a real ND-120 CPU.
- Convert the schematics to Verilog (Built in functionality in Logisim).
- Make test programs using Verilator to test the logic, then program that into an FPGA HW Device to test.
- Development is done in the open, check out https://github.com/RonnyA/nd-120
- Help is much appreciated as I am new to Verilog and FPGA programming
- When CPU PCB is finished, with serial port access to OPCOM the next step is to implement support for IO devices like floppy and harddrive.
- Draw the digital logic using Logisim Evolution.
- Creating a new CPU emulator at hardware level using the original design documents from 1988
TDV 2215 Emulator
- Creating an emulator of the TDV2215 terminal.
- Using the original schematics, an emulated 8085 CPU and ROM dumps from an original TDV.
- The ROM code does some HW validation and fails with "ERROR NO.: qt" -There are multiple areas it can fail: Z80SIO UART emulation, Interrupt handling and memory mapping.
- I am still working on mapping the original HW to my emulator.
- Using Ghidra to reverse engineer the ROM code, but its hard to understand what the ROM code really tries to do, and why it fails. Having had the source code with comments would have been helpful :)
ND-110 Compact
I have beeen so lucky that I have gotten a real ND-110/CX Compact with the following HW configuration
| SLOT | ID | PCB | Description | Print and ECO |
|---|---|---|---|---|
| 12 | 324113 | PCB 3042 | 1 MB Memory | Print A ECO D |
| 11 | 322623 | PCB 3023 | ND100 MEGALINK IF | Print D ECO K |
| 10 | 324534 | PCB 3094 | ETHERNET IF. II | Print C |
| 9 | 324011 | PCB 3111 | 8 TERM IF W/FIFO | Print C |
| 8 | 324012 | PCB 3112 | 8" + 5 1/4 FLOPPY | Print B |
| 7 | 322671 | PCB 3041 | N-100 ST 506 DISK CONTR. | Print E ECO K |
| 6 | 322623 | PCB 3023 | ND100 MEGALINK IF | Print D ECO K |
| 5 | 322623 | PCB 3023 | ND100 MEGALINK IF | Print D ECO G |
| 4 | 322615 | PCB 3015 | ND100 HDLC W/A.LO | Print <unknown> |
| 3 | 322615 | PCB 3015 | ND100 HDLC W/A.LO. | Print S ECO V |
| 2 | 324137 | PCB 3090 | ND110 - CPU&MM 32B | Print K ECO R |
| 1 | 322672 | PCB 3042 | N100 2MB RAM | Print A ECO D |
The machine also has a Micropolis 1325 ST506 74MB drive. Sadly there is some issues with reading data from it.
- Reading head 0-3 works on all tracks
- Reading head 4-7 fails on all tracks with error "Address mismatch"
I also got a TDV 1200 terminal, which upon startup had a capacitor in the powersupply to burn. I am in the process of repairing the HW. To connect to the ND machine I use a serial-to-current loop adapter i bought from Mouser.