User:RHansen: Difference between revisions
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** CX opcodes (Stack, Segment,) | ** CX opcodes (Stack, Segment,) | ||
** ND-110 Specific opcodes | ** ND-110 Specific opcodes | ||
*** Since I now have the ND-110 emulator working, I should be able do decode how the missing opcodes work and get them working. | |||
* Focusing on getting SINTRAN H work 100% flawlessly (could be opcodes, but at the moment all my trouble is inside ''MON 131 ABSTR'') | * Focusing on getting SINTRAN H work 100% flawlessly (could be opcodes, but at the moment all my trouble is inside ''MON 131 ABSTR'') | ||
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** Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator | ** Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator | ||
*** Everything is written in C#/.NET7 | *** Everything is written in C#/.NET7 | ||
*** MicroCode compiler works | *** MicroCode compiler works. | ||
*** MicroCode retrieved from PDF document using OCR techniques mixed with some "text washing" gives me a file with 16600 lines of microcode I manually have validate against the PDF. | *** MicroCode retrieved from PDF document using OCR techniques mixed with some "text washing" gives me a file with 16600 lines of microcode I manually have validate against the PDF. After retriving a copy of a ROM for a ND-110 cpu board, I could compare the compiled result with the ROM and found 150+ errors in the source file. Now that is fixed, and the compiled microcode is identical to the ROM. | ||
*** | *** | ||
*** MicroCode CPU | *** MicroCode CPU working. I have implemented registers, ALU (really 4x Am2901 chips) and interrupts (Am2914 chip) | ||
**** | **** The remaining parts are to get the interrupt subsystem 100% correct, then add memory management and implement Traps. | ||
*** | **** I am looking for more information that explains the Trap handling. | ||
*** This CPU | *** Macro code execution works, except interrupts and traps. | ||
*** This CPU is definitively slower than the ND-100 emulator, but hopefully behave 100% like the original. This way I can verify behavior differences between the ND-100 opcodes and the ND-110 opcodes. | |||
*** If you want to test the emulator/debugger, its available at [https://nd110.hackercorp.no/ https://nd110.hackercorp.no/] | |||
[[File:Tdv-2215-boot-emul-err.png|200px|thumb|right|TDV2215 booting with error]] | [[File:Tdv-2215-boot-emul-err.png|200px|thumb|right|TDV2215 booting with error]] | ||
Line 113: | Line 117: | ||
** The ROM code does some HW validation and fails with "ERROR NO.: qt" -There are multiple areas it can fail: Z80SIO UART emulation, Interrupt handling and memory mapping. | ** The ROM code does some HW validation and fails with "ERROR NO.: qt" -There are multiple areas it can fail: Z80SIO UART emulation, Interrupt handling and memory mapping. | ||
** I am still working on mapping the original HW to my emulator. | ** I am still working on mapping the original HW to my emulator. | ||
** Using Ghidra to reverse engineer the ROM code, but its hard to understand what the ROM code really tries to do, and why it fails. Having had the source code with comments would have been helpful :) | ** Using Ghidra to reverse engineer the ROM code, but its hard to understand what the ROM code really tries to do, and why it fails. Having had the source code with comments would have been helpful :) | ||
==Open Source== | ==Open Source== | ||
* When I have a stable working version, I am planning to put the source code on GitHub under a BSD License. Then everyone can look at the code, modify it or just run it. | * When I have a stable working version, I am planning to put the source code on GitHub under a BSD License. Then everyone can look at the code, modify it or just run it. | ||
* I have been playing with the idea on porting my C# code to C - when its stable. And integrate it in the SIMH projects [https://github.com/open-simh/simh]. For this I may need help :) | * I have been playing with the idea on porting my C# code to C - when its stable. And integrate it in the SIMH projects [https://github.com/open-simh/simh]. For this I may need help :) |
Revision as of 09:56, 14 April 2023
Real name: | Ronny Hansen |
Role: | Developer, Architect, Geek |
Interrested in: | Everything between Embedded and Cloud |
A long time ago, in another universe it seems, I was using SINTRAN on an ND-100 at our electronics/computer school. We configured and ran the machine after we inherited it.
These days I am a Cloud Architect, Developer and Geek - and the last years I have been spending an unhealthy amount of time writing emulators. You can read how this crazy journey started here [1]
ND-100 Emulator
I have successfully (with some help) created an ND-100 emulator in .NET/C# with peripherals such as TeleType, Floppy and HardDrive. (I have to admit I have borrowed some of the complex opcodes from the existing nd100em emulator )
The emulator contains a debugger, disassembler and code tracer in addition to logic to mount different floppy-image, read/write hardddrive, loading BPUN and PROG files directly into memory.
I have successfully dumped and booted SINTRAN version H in ND-100 mode, although there are still some bugs to iron out.
I have tried booting SINTRAN K, L and M. Dumping to HDD works great, but I haven't successfully managed to boot SINTRAN from HD with 22! If using DISK-75MB-1, I am actually able to make SINTRAN start. However it fails after a while with a
What's working in the ND-100 emulator
- SINTRAN H boots and runs (with a minor hardcode in the emulator to fix ABSTR bug (?))
- Test programs that validates the opcodes so far
- ONE—CHECK, TWO—CHECK, THREE—CHECK
- FOUR—CHECK (a few bugs still)
- INSTRUCTION-B.BPUN (PROGRAM NUMBER: 204384B DATE ISSUED : 83.11.01)
- PAGING-B.BPUN (PROGRAM NUMBER: 203098B 1982)
- FLOPPY-FU-1986F (All tests work except Test 2 "Format Decoder Test" on my PIO floppy driver)
- Test programs on floppy "210523E00-XX-01D"
- INSTRUCTION - Version: C00 - 1986-10-30
- "48 BITS FLOATING INSTRUCTIONS" - not working as I am only emulating 32 bits FPU
- PAGING - Version: C00 - 1986-10-16
- All tests report success in MMS-1 and MMS-2 mode.
- INSTRUCTION - Version: C00 - 1986-10-30
What's NOT working in the ND-100 emulator
- SINTRAN K,L and M doesn't boot fully yet.. There are some page-table mappings that fail with memory exception, and SINTRAN ends up looping. I am guessing the bug is related to memory access or interrupt handling, but so far, I haven't been able to track down the bug.
Hopefully implementing the same logic in the ND-110 microcode cpu emulator may help me identify whats different/buggy.
- MON 131 ABSTR behaves "buggy" in SINTRAN H
- Something odd happens with zero-pointers for some logical devices sending the CPU into a loop at P=0
- Odd behavior in CONFIGURATION on interrupt detection (see picture on the right)
- Copying file from papertape driver to SINTRAN disk with "COPY 'FILE:BPUN' PT1' fails after 129 bytes. It just stops, and I have to cancel the copy with ESC key.
I am looking for the following
- Documentation on the ND-100 register ACTL (Active Level). It looks like it's 3 bits, and its not PIL.
- After some testing I discovered that ACTL is (1<<PIL)
- Images of SINTRAN J floppies. The source code that has been scanned is SINTRAN J, but since I now have access to source code for version L this is less important now.
- Information on what REALLY happens in the Registes that are "locked" (Like IIC, PEA, PES) Documentation says its "locked" when there is an error, and "unlocked" during an TRA IIC <= Starting to get an understanding while implementing ND-110 CPU :-)
- Other binary images (Tape, PaperTape, HDD, Floppy,+++) All SINTRAN III versions are of interrest.
- ROM's with Microcode for ND-10, ND-100, ND-110
- Documentation on device and IOX register usage for all peripherals, especially Ethernet
- Source Code. Any source code. Especially test programs and IO drivers.
- Documentation on Date/Time format/calculation for file/timestamps
- Hard Disk boot sector information - currently I must boot from via "boot floppies" and I would like to be able to boot directly from the HDD.
- Starting to get a grip on this, as there is some documentation in the microcode. I have understood floppy-boot, working on understanding HDD boot (or maybe I just need a bootable HD)
Things I am working on
- After getting the source code for SINTRAN L, I am now focusing on getting version L to boot to login prompt.
- Dumping to DISK-75MB-1 works great. Boot startes and runs around 2.5 million instructions before it hangs.
- Currently stuck on a page-fault in a none-demand segment after SINTRAN starts the RT system. SINTRAN Segment Administration on Level 3 tries to give it a PageTable setting, but can't. It then restarts the process, and we have a never-ending loop.
- JMP 042314 = ESCER => Page Fault! PT=9 VPN=17 PTe=00000000 Accessmode=FETCH PGS=141121
- Getting the I/O devices to work flawlessly. Normal read/write works in my drivers, but test-programs are not working 100% as they are enabling "test mode" which I havent implemented (yet).
- I am focusing on getting the ND-10/ND-100 opcodes working 100%. (I do believe that the ones that are implemented are "almost" bugfree)
- Implementing the missing opcodes
- «Commercial Extended» (CE) option (BCD)
- CX opcodes (Stack, Segment,)
- ND-110 Specific opcodes
- Since I now have the ND-110 emulator working, I should be able do decode how the missing opcodes work and get them working.
- Focusing on getting SINTRAN H work 100% flawlessly (could be opcodes, but at the moment all my trouble is inside MON 131 ABSTR)
- ND-110 MicroCode CPU
- Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator
- Everything is written in C#/.NET7
- MicroCode compiler works.
- MicroCode retrieved from PDF document using OCR techniques mixed with some "text washing" gives me a file with 16600 lines of microcode I manually have validate against the PDF. After retriving a copy of a ROM for a ND-110 cpu board, I could compare the compiled result with the ROM and found 150+ errors in the source file. Now that is fixed, and the compiled microcode is identical to the ROM.
- MicroCode CPU working. I have implemented registers, ALU (really 4x Am2901 chips) and interrupts (Am2914 chip)
- The remaining parts are to get the interrupt subsystem 100% correct, then add memory management and implement Traps.
- I am looking for more information that explains the Trap handling.
- Macro code execution works, except interrupts and traps.
- This CPU is definitively slower than the ND-100 emulator, but hopefully behave 100% like the original. This way I can verify behavior differences between the ND-100 opcodes and the ND-110 opcodes.
- If you want to test the emulator/debugger, its available at https://nd110.hackercorp.no/
- Creating a new CPU emulator at the MicroCode level to teach me more about the internals of the opcodes, but also to (hopefully) help me identify "features" in my ND-100 Emulator
- Creating an emulator of the TDV2215 terminal.
- Using the original schematics, an emulated 8085 CPU and ROM dumps from an original TDV.
- The ROM code does some HW validation and fails with "ERROR NO.: qt" -There are multiple areas it can fail: Z80SIO UART emulation, Interrupt handling and memory mapping.
- I am still working on mapping the original HW to my emulator.
- Using Ghidra to reverse engineer the ROM code, but its hard to understand what the ROM code really tries to do, and why it fails. Having had the source code with comments would have been helpful :)
Open Source
- When I have a stable working version, I am planning to put the source code on GitHub under a BSD License. Then everyone can look at the code, modify it or just run it.
- I have been playing with the idea on porting my C# code to C - when its stable. And integrate it in the SIMH projects [2]. For this I may need help :)