NLZ: Difference between revisions

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|Affected=(T), (A), (D)
|Affected=(T), (A), (D)
|Arcitecture=[[ND-100]], [[ND-110 CPU|ND-110]]
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]]
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Revision as of 13:35, 3 August 2009

NLZ
Description Normalize (integer to floating)
Format NLZ <scaling>
Code 151 4008
Affected (T), (A), (D)
Type User
Architecture ND-100, ND-110

NLZ is an assembly instruction. It converts the number in the A register to a standard form 48-bit floating point number in the floating point accumulator (T, A and D registers), using the scaling of the NLZ instruction as a scaling factor.

The scaling is given to the conversion of -128 to 127 (approximately 10-39 to 1039).

For integers, a scaling factor of +1610 will give a floating point number with the same value as the integer. A larger scaling factor will result in a higher floating point number. Because of the single precision fixed point number, the D register will be cleared.


Example

  • NLZ+20 (code 151420) Convert from integer to floating point.


NLZ on 32-bit floating point CPUs

Main article: 32-bit floating point

The ND-100/110 can have a 48-bit floating point CPU (standard configuration) or a 32-bit floting point CPU (customer option). For 32-bit floating point operations NLZ works as described above, except that the T register is not affected.

References