STT: Difference between revisions

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(+text from " ND-110 Instruction Set")
m (Spellfix: Arcitecture -> Architecture)
 
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|Mnemonic=STT
|Mnemonic=STT
|Description=Store T register
|Description=Store T register
|Format=STT ''<address mode> <disp.>''
|Format=STT ''<[[ND-100 addressing modes|addr. mode]]> <[[displacement|disp.]]>''
|Code=010&nbsp;000<sub><small>8</small></sub>
|Code=010&nbsp;000
|Affected=(EL):=T
|Affected=(ea):=T
|Arcitecture=[[ND-100]], [[ND-110 CPU|ND-110]]
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]]
}}
}}


'''STA''' is an instruction on the ND platform. It stores the contents of the [[T register]] in the memory location pointed to by the [[effective address]].
'''STT''' is an assembly instruction. It stores the contents of the [[T register]] in the memory location pointed to by the [[effective address]].





Latest revision as of 13:30, 3 August 2009

STT
Description Store T register
Format STT <addr. mode> <disp.>
Code 010 0008
Affected (ea):=T
Type User
Architecture ND-100, ND-110

STT is an assembly instruction. It stores the contents of the T register in the memory location pointed to by the effective address.


Sources