3094: Difference between revisions
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'''3094''' is the Ethernet II controller. | [[File:3094 component.jpg|thumbnail|3094 Ethernet II, component side]] | ||
[[File:3094 solder.jpg|thumbnail|3094 Ethernet II, solder side]] | |||
[[File:3094 card edge.jpg|thumbnail|3094 Ethernet II, card edge]] | |||
'''3094''' is the Ethernet II controller (ND number 110063). | |||
{{Stub}} | {{Stub}} | ||
==Introduction== | ==Introduction== | ||
It is an ethernet interface for [[ND-100]] machines. The controller conforms to IEEE 802.3 and ISO/DIS 8802/3 standards. [[ND-100]] based systems can drive a maximum of four Ethernet II controllers. The Ethernet controller implements the three lower layers of the [http://en.wikipedia.org/wiki/Open_Systems_Interconnection OSI] seven layer model ([http://en.wikipedia.org/wiki/OSI_model OSI model]) for system communication. | It is an ethernet interface for [[ND-100]] machines. The controller conforms to [http://en.wikipedia.org/wiki/IEEE IEEE] [http://en.wikipedia.org/wiki/802.3 802.3], [http://en.wikipedia.org/wiki/Ecma_International ECMA] 80/81/82 and [http://en.wikipedia.org/wiki/ISO ISO]/DIS 8802/3 standards. [[ND-100]] based systems can drive a maximum of four Ethernet II controllers. The Ethernet controller implements the three lower layers of the [http://en.wikipedia.org/wiki/Open_Systems_Interconnection OSI] seven layer model ([http://en.wikipedia.org/wiki/OSI_model OSI model]) for system communication. | ||
==Switches and indicators== | ==Switches and indicators== | ||
Indicators on the card, from the top of the card | Indicators on the card, from the top of the card | ||
Line 30: | Line 34: | ||
The A and B connectors are used for I/O, the C connector is used for the [[ND-100 Bus]]. | The A and B connectors are used for I/O, the C connector is used for the [[ND-100 Bus]]. | ||
==I/O Devices on the card== | ==I/O Devices on the card== | ||
===Ethernet control register=== | |||
address: device address + 1 (or 3) | |||
This is a 16-bit register controlling the following functions | |||
*bit 15-9 - not used | |||
*bit 8 - disable check bit | |||
*bit 7 - not used | |||
*bit 6 - power low | |||
*bit 5 - halt | |||
*bit 4 - reset | |||
*bit 3 - start [[OPCOM]] | |||
*bit 2 - ND interrupt | |||
*bit 1 - not used | |||
*bit 0 - enable [[SCIP]] interrupt | |||
A [[Master Clear]] pulse from the ND-100 (or power-on) will set the controller RESET and HALT signals and reset any local I/O activity. | |||
The [[ND-100]] starts controller activity by writing to the control register with the halt and reset bits cleared (zero). | |||
The [[ND-100]] writes to this register using an [[IOXT]] instruction. The device address of the controller + 1 (or 3) must be loaded into the [[T register]] before an [[IOXT]] is executed. | |||
===Ethernet status register=== | |||
address: device address + 0 (or 2) | |||
It has the following format | |||
*bit 15-8 - bank number | |||
Bit 8 and 9 are always zero as the controller must start on a half-megabyte boundary i.e. the bank number is always a multiple of four. | |||
*bit 6 - memory is 512 Kbytes (always zero) | |||
*bit 5 - halt | |||
*bit 4 - reset active | |||
*bit 2 - interrupt set for ND-100 on level 12 | |||
*bit 0 - interrupt enabled onto ND-100 bus | |||
The [[ND-100]] reads this register using an [[IOXT]] instruction. The device address of the controller + 0 (or 2) must be loaded into the [[T register]] before an [[IOXT]] is executed. | |||
==Hardware architecture== | |||
The controller is implemented on a single ND-100 card, featuring the following blocks. | |||
===68000 local processor=== | |||
The [http://en.wikipedia.org/wiki/68000 68000] is a 10 MHz, 16-bit processor dedicated to the I/O processing required by the Ethernet controller. Its basic controls signals - [[HALT]] and [[RESET]] - are directly set by the [[ND-100]]. | |||
====Interrupt Levels==== | |||
The 68000 interrupt levels are assigned as follows | |||
*7 - ND-100 power low | |||
*6 - ND-100 OPCOM | |||
*5 - parity error | |||
*4 - test console (PTC) | |||
*3 - MFP (and ND-100) | |||
*2 - [[LANCE]] interrupt | |||
*1 - not used | |||
*0 - indicates no interrupt | |||
Interrupt level 7 has the highest priority and level 0 the lowest. | |||
===LANCE=== | |||
The Am7990 [[LANCE]] is a single integrated circuit featuring | |||
*onboard [[DMA]] and buffer management (48 byte [[FIFO]] known as a [[Silo]]) | |||
*network and packet error reporting | |||
*back-to-back packet reception | |||
*network diagnostics | |||
**internal / external loopback | |||
**[[CRC]] logic check | |||
**time domain reflectometer | |||
The [[LANCE]] operates in two modes | |||
*transmit | |||
*receive | |||
In transmit mode, the [[LANCE]] directly accesses data in memory and formats it into a [[packet]] for transmission. The packet consists of | |||
*preamble | |||
*sync pattern | |||
*data | |||
*32-bit CRC | |||
The [[LANCE]] transmits the packet to the [[SIA]]. It loads the first byte of data into its [[Silo]]. Then, as the LANCE transmits the preamble to the SIA, it simultaneously loads the [[Silo]] with the remaining data. | |||
In receive mode, packets are loaded into the Silo via the SIA. The CRC of the received data is calculated and and compared and appended to CRC field given by the packet. If the CRCs do not match, an error bit is set. | |||
====Error reporting==== | |||
System errors reported by the LANCE includes | |||
*babbling transmitter (the transmitter attempts to send more than 1518 data bytes) | |||
*collision (collision detection malfunctions) | |||
*missed packet (insufficient buffer space) | |||
*memory timeout (25.6 microseconds) | |||
Packet errors include: | |||
*CRC (data invalid) | |||
*framing (the end of the packet was not on a byte boundary). This is also known as octet or alignment error. | |||
*overflow / underflow (slow response to a DMA request) | |||
*buffer (insufficient buffer space) | |||
===SIA=== | |||
The [[SIA]] (Am7992B) is a single integrated circuit featuring | |||
*a Manchester encoder / decoder | |||
*collision detection | |||
For transmission the SIA encodes the separate clock and [http://en.wikipedia.org/wiki/Non-return-to-zero NRZ] data packet into a standard [http://en.wikipedia.org/wiki/Manchester_code Manchester] II serial bit stream. | |||
For reception the SIA indicates to the [[LANCE]] that data is being received and separates the incoming Manchester-encoded data stream into clock and NRZ data. | |||
Any collisions on the network are detected and signaled to the [[LANCE]]. | |||
===local memory=== | |||
The local memory consists of | |||
*512 Kbyte DRAM (dynamic RAM) | |||
*1 Kbit SRAM (static RAM) | |||
*128 Kbyte EPROM (future option) | |||
====local DRAM==== | |||
The local DRAM is accessible from the [[ND-100]] as if it were any other [[ND-100]] memory bank. The location of the DRAM in the ND-100 address space is set by two thumbwheels, see the [[3094#Switches_and_indicators|Switches and indicators]] section. The bank number of the card can be read back to the ND-100 using the [[IOXT]] instruction. | |||
Messages between the controller and ND-100 can be transferred via special mailbox ares in the DRAM. | |||
To pass messages the Ethernet controller can interrupt the [[ND-100]] and vice versa. The controller's control and status registers are under the direct control of the [[ND-100]]. | |||
====EPROM==== | |||
The 128K by 16 bit [http://en.wikipedia.org/wiki/EPROM EPROM] can only be accessed by the [http://en.wikipedia.org/wiki/68000 68000]. the EPROM is currently not used by the controller, so the boards are delivered with empty EPROM sockets. Future developments may implement EPROM. | |||
===Ethernet transceiver power control=== | |||
A current switch monitors the DC current supplied to the transceiver from the [[ND-100]] via the controller card. The current switch will disconnect the supply on controller command or when the current level could harm hardware or data integrity. | |||
===MFP=== | |||
===ND-100 bus interface=== | |||
==Installation== | ==Installation== | ||
===Hardware needed=== | ===Hardware needed=== | ||
Line 45: | Line 159: | ||
**as a result of a hanging transmitter | **as a result of a hanging transmitter | ||
**if the heartbeat is missing | **if the heartbeat is missing | ||
==Ethernet accessories== | |||
The listing below has the ND number, followed by the product description. | |||
*107700 - transceiver cable, 5m | |||
*107710 - transceiver cable, 15m | |||
*107720 - Ethernet 50 ohm terminator | |||
*107730 - Ethernet cable splice | |||
*107740 - Ethernet transceiver | |||
*107750 - local repeater package (includes 1 repeater, 2 transceivers and 2 transceiver cables) | |||
*107760 - Ethernet coaxial cable, 23.4m | |||
*107770 - Ethernet coaxial cable, 70.2m | |||
*107780 - Ethernet coaxial cable, 117m | |||
*107790 - remote repeater package (includes 2 repeaters, 2 transceivers and 2 15m transceiver cables) | |||
*107830 - fan out package | |||
== ECO == | |||
Here is a list of known ECO's (Engineering Change Order) for this card. | |||
* ECO 100-773 - CP 121 might short 12V to ground<ref name="ECO">sintran.com, Norsk Data library, ECO [http://sintran.com/sintran/library/libeco/libeco.html]</ref> | |||
* ECO 100-776 - Better performance, power fail corrections<ref name="ECO"></ref> | |||
* ECO 100-777 - Memory out of range<ref name="ECO"></ref> | |||
* ECO 100-780 - A false Memory Parity Error<ref name="ECO"></ref> | |||
* ECO 100-783 - Memory out of range, Memory parity error<ref name="ECO"></ref> | |||
==Reference== | ==Reference== | ||
{{ND-doc|12.055.01}} | {{ND-doc|12.055.01}} | ||
[[Category:ND-100 hardware]] | [[Category:ND-100 hardware]] |
Latest revision as of 15:11, 10 January 2020
3094 is the Ethernet II controller (ND number 110063).
This article is a stub. You can improve NDWiki by expanding it. |
Introduction
It is an ethernet interface for ND-100 machines. The controller conforms to IEEE 802.3, ECMA 80/81/82 and ISO/DIS 8802/3 standards. ND-100 based systems can drive a maximum of four Ethernet II controllers. The Ethernet controller implements the three lower layers of the OSI seven layer model (OSI model) for system communication.
Switches and indicators
Indicators on the card, from the top of the card
- "8" - yellow LED - external 12V transceiver
- "2" - red LED - 68000 halt
- "1" - red LED - 68000 reset
- "3" - yellow LED - active memory cycle
- "5" - red LED - memory parity error
Thumbwheel switches, from top of the card
- 12J - Ethernet number, An ND-100 can control four Ethernet controllers. The device address of a controller in the system is set by this switch. Position of the switch as follows:
- 0 - ethernet number 1 - device number 140360 (octal) - ident code 140034 (octal)
- 1 - ethernet number 2 - device number 140364 (octal) - ident code 140035 (octal)
- 2 - ethernet number 3 - device number 140370 (octal) - ident code 140036 (octal)
- 3 - ethernet number 3 - device number 140374 (octal) - ident code 140037 (octal)
- 9J - memory bank number
- 7J - memory bank number
These thumbwheels selects the memory bank accessible to the controller, as follows:
- 7J: 0, 9J: 0-3, bank number: 0, PIOC address space: 0 - 512 Kbytes, physical page: 0 - FF (hex)
- 7J: 0, 9J: 4-7, bank number: 4, PIOC address space: 512 - 1024 Kbytes, physical page: 100 - 1FF (hex)
- 7J: 0, 9J: 8-11, bank number: 8, PIOC address space: 1024 - 1536 Kbytes, physical page: 200 - 2FF (hex)
- 7J: 0, 9J: 12-15, bank number: 12, PIOC address space: 1536 - 2048 Kbytes, physical page: 300 - 3FF (hex)
- 7J: 1, 9J: 0, bank number: 16, PIOC address space: 2048 - 2560 Kbytes, physical page: 400 - 4FF (hex)
etc.
Connectors
The A and B connectors are used for I/O, the C connector is used for the ND-100 Bus.
I/O Devices on the card
Ethernet control register
address: device address + 1 (or 3)
This is a 16-bit register controlling the following functions
- bit 15-9 - not used
- bit 8 - disable check bit
- bit 7 - not used
- bit 6 - power low
- bit 5 - halt
- bit 4 - reset
- bit 3 - start OPCOM
- bit 2 - ND interrupt
- bit 1 - not used
- bit 0 - enable SCIP interrupt
A Master Clear pulse from the ND-100 (or power-on) will set the controller RESET and HALT signals and reset any local I/O activity.
The ND-100 starts controller activity by writing to the control register with the halt and reset bits cleared (zero).
The ND-100 writes to this register using an IOXT instruction. The device address of the controller + 1 (or 3) must be loaded into the T register before an IOXT is executed.
Ethernet status register
address: device address + 0 (or 2)
It has the following format
- bit 15-8 - bank number
Bit 8 and 9 are always zero as the controller must start on a half-megabyte boundary i.e. the bank number is always a multiple of four.
- bit 6 - memory is 512 Kbytes (always zero)
- bit 5 - halt
- bit 4 - reset active
- bit 2 - interrupt set for ND-100 on level 12
- bit 0 - interrupt enabled onto ND-100 bus
The ND-100 reads this register using an IOXT instruction. The device address of the controller + 0 (or 2) must be loaded into the T register before an IOXT is executed.
Hardware architecture
The controller is implemented on a single ND-100 card, featuring the following blocks.
68000 local processor
The 68000 is a 10 MHz, 16-bit processor dedicated to the I/O processing required by the Ethernet controller. Its basic controls signals - HALT and RESET - are directly set by the ND-100.
Interrupt Levels
The 68000 interrupt levels are assigned as follows
- 7 - ND-100 power low
- 6 - ND-100 OPCOM
- 5 - parity error
- 4 - test console (PTC)
- 3 - MFP (and ND-100)
- 2 - LANCE interrupt
- 1 - not used
- 0 - indicates no interrupt
Interrupt level 7 has the highest priority and level 0 the lowest.
LANCE
The Am7990 LANCE is a single integrated circuit featuring
- onboard DMA and buffer management (48 byte FIFO known as a Silo)
- network and packet error reporting
- back-to-back packet reception
- network diagnostics
- internal / external loopback
- CRC logic check
- time domain reflectometer
The LANCE operates in two modes
- transmit
- receive
In transmit mode, the LANCE directly accesses data in memory and formats it into a packet for transmission. The packet consists of
- preamble
- sync pattern
- data
- 32-bit CRC
The LANCE transmits the packet to the SIA. It loads the first byte of data into its Silo. Then, as the LANCE transmits the preamble to the SIA, it simultaneously loads the Silo with the remaining data.
In receive mode, packets are loaded into the Silo via the SIA. The CRC of the received data is calculated and and compared and appended to CRC field given by the packet. If the CRCs do not match, an error bit is set.
Error reporting
System errors reported by the LANCE includes
- babbling transmitter (the transmitter attempts to send more than 1518 data bytes)
- collision (collision detection malfunctions)
- missed packet (insufficient buffer space)
- memory timeout (25.6 microseconds)
Packet errors include:
- CRC (data invalid)
- framing (the end of the packet was not on a byte boundary). This is also known as octet or alignment error.
- overflow / underflow (slow response to a DMA request)
- buffer (insufficient buffer space)
SIA
The SIA (Am7992B) is a single integrated circuit featuring
- a Manchester encoder / decoder
- collision detection
For transmission the SIA encodes the separate clock and NRZ data packet into a standard Manchester II serial bit stream.
For reception the SIA indicates to the LANCE that data is being received and separates the incoming Manchester-encoded data stream into clock and NRZ data.
Any collisions on the network are detected and signaled to the LANCE.
local memory
The local memory consists of
- 512 Kbyte DRAM (dynamic RAM)
- 1 Kbit SRAM (static RAM)
- 128 Kbyte EPROM (future option)
local DRAM
The local DRAM is accessible from the ND-100 as if it were any other ND-100 memory bank. The location of the DRAM in the ND-100 address space is set by two thumbwheels, see the Switches and indicators section. The bank number of the card can be read back to the ND-100 using the IOXT instruction.
Messages between the controller and ND-100 can be transferred via special mailbox ares in the DRAM.
To pass messages the Ethernet controller can interrupt the ND-100 and vice versa. The controller's control and status registers are under the direct control of the ND-100.
EPROM
The 128K by 16 bit EPROM can only be accessed by the 68000. the EPROM is currently not used by the controller, so the boards are delivered with empty EPROM sockets. Future developments may implement EPROM.
Ethernet transceiver power control
A current switch monitors the DC current supplied to the transceiver from the ND-100 via the controller card. The current switch will disconnect the supply on controller command or when the current level could harm hardware or data integrity.
MFP
ND-100 bus interface
Installation
Hardware needed
- The 3094 controller card
- Ethernet/GPIB plug panel
- internal cable between controller and plug panel
- an ethernet transceiver
ethernet transceiver
The transceiver is powered by the ND-100's 12 V DC power supply via the Ethernet controller. A current switch will disconnect the power to the transceiver in case of
- short circuit or excessive transceiver current consumption
- low 5 Volt supply
- a power off command from the controller. A power-off command is issued:
- after jabber (data transmitted to jam the network)
- as a result of a hanging transmitter
- if the heartbeat is missing
Ethernet accessories
The listing below has the ND number, followed by the product description.
- 107700 - transceiver cable, 5m
- 107710 - transceiver cable, 15m
- 107720 - Ethernet 50 ohm terminator
- 107730 - Ethernet cable splice
- 107740 - Ethernet transceiver
- 107750 - local repeater package (includes 1 repeater, 2 transceivers and 2 transceiver cables)
- 107760 - Ethernet coaxial cable, 23.4m
- 107770 - Ethernet coaxial cable, 70.2m
- 107780 - Ethernet coaxial cable, 117m
- 107790 - remote repeater package (includes 2 repeaters, 2 transceivers and 2 15m transceiver cables)
- 107830 - fan out package
ECO
Here is a list of known ECO's (Engineering Change Order) for this card.
- ECO 100-773 - CP 121 might short 12V to ground[1]
- ECO 100-776 - Better performance, power fail corrections[1]
- ECO 100-777 - Memory out of range[1]
- ECO 100-780 - A false Memory Parity Error[1]
- ECO 100-783 - Memory out of range, Memory parity error[1]
Reference
Norsk Data Document ND–12.055.01 Ethernet II Controller