IOX error: Difference between revisions
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On the hardware level an address is put onto the ND-100 bus and the BAPR (Bus Address Present) control signal is asserted and then the BIOXE strobe is sent out from the bus control to strobe the data to or from the IO device. When the IO device has accepted or put out the data on the bus the device asserts the BRDY (Board Ready) signal within 10 ms. If there is no response within that time the IO access cycle is terminated and an IOX ERROR interrupt is made if the IOX bit in the interrupt enable register is set. | On the hardware level an address is put onto the ND-100 bus and the BAPR (Bus Address Present) control signal is asserted and then the BIOXE strobe is sent out from the bus control to strobe the data to or from the IO device. When the IO device has accepted or put out the data on the bus the device asserts the BRDY (Board Ready) signal within 10 ms. If there is no response within that time the IO access cycle is terminated and an IOX ERROR interrupt is made if the IOX bit in the interrupt enable register is set. | ||
== Reference == | |||
*{{ND-doc|06.015.02|page 6-25}} |
Latest revision as of 23:56, 17 January 2009
If an IOX or IOXT instruction is made to a non existing IO address then an interrupt will be generated after a timeout of 10 ms.
On the hardware level an address is put onto the ND-100 bus and the BAPR (Bus Address Present) control signal is asserted and then the BIOXE strobe is sent out from the bus control to strobe the data to or from the IO device. When the IO device has accepted or put out the data on the bus the device asserts the BRDY (Board Ready) signal within 10 ms. If there is no response within that time the IO access cycle is terminated and an IOX ERROR interrupt is made if the IOX bit in the interrupt enable register is set.
Reference
- Norsk Data Document ND–06.015.02 ND-100 FUNCTIONAL DESCRIPTION page 6-25