NLZ: Difference between revisions
(refrase) |
(Register notation uniformity fix) |
||
| (7 intermediate revisions by the same user not shown) | |||
| Line 4: | Line 4: | ||
|Format=NLZ ''<scaling>'' | |Format=NLZ ''<scaling>'' | ||
|Code=151 400 | |Code=151 400 | ||
|Affected= | |Affected=T, A, D | ||
| | |Architecture=[[ND-100]], [[ND-110 CPU|ND-110]] | ||
}} | }} | ||
'''NLZ''' is an assembly instruction. It converts the number in the [[A register]] to a standard form floating number in the [[floating point accumulator]] (A and D registers), using the ''scaling'' of the NLZ instruction as a scaling factor. | '''NLZ''' is an assembly instruction. It converts the number in the [[A register]] to a standard form [[48-bit floating point]] number in the [[floating point accumulator]] (T, A and D registers), using the ''scaling'' of the NLZ instruction as a scaling factor. | ||
The ''scaling'' is given to the conversion of -128 to 127 (approximately 10<sup>-39</sup> to 10<sup>39</sup>). | The ''scaling'' is given to the conversion of -128 to 127 (approximately 10<sup>-39</sup> to 10<sup>39</sup>). | ||
| Line 19: | Line 19: | ||
== | ==== NLZ on 32-bit floating point CPUs ==== | ||
{{main| | {{main|32-bit floating point}} | ||
The ND-110 can have a 48-bit floating point CPU | The ND-100/110 can have a 48-bit floating point CPU (standard configuration) or a 32-bit floating point CPU (customer option). | ||
For 32-bit floating point operations NLZ works as described above, except that the T register is not affected. This can also be used to test for 48-bit vs. 32-bit CPUs. The method is described in {{ND-doc|06.029.01}}<ref>{{ND-doc|06.029.01}}</ref> p.72: | |||
SAT 0 % Set T register to zero (INSTRUCTION-B test program uses 'COPY 0 DT') | |||
SAA 1 % Set A register bit one | |||
NLZ 16 % Normalize with scaling factor 16 decimal | |||
% Test if T is changed (non-zero). If so, the CPU is 48-bit, otherwise it is 32-bit. | |||
== References == | == References == | ||
*{{ND-doc|06.014.02| | <references/> | ||
*{{ND-doc|06.014.02|pages 120, 144, 146 and 240}} | |||
*{{ND-doc|06.029.01|page 70 and 72}} | *{{ND-doc|06.029.01|page 70 and 72}} | ||
[[Category:ND-100 instructions]] | [[Category:ND-100 instructions]] | ||
Latest revision as of 08:48, 21 March 2013
| NLZ | |
|---|---|
| Description | Normalize (integer to floating) |
| Format | NLZ <scaling> |
| Code | 151 4008 |
| Affected | T, A, D |
| Type | User |
| Architecture | ND-100, ND-110 |
NLZ is an assembly instruction. It converts the number in the A register to a standard form 48-bit floating point number in the floating point accumulator (T, A and D registers), using the scaling of the NLZ instruction as a scaling factor.
The scaling is given to the conversion of -128 to 127 (approximately 10-39 to 1039).
For integers, a scaling factor of +1610 will give a floating point number with the same value as the integer. A larger scaling factor will result in a higher floating point number. Because of the single precision fixed point number, the D register will be cleared.
Example
- NLZ+20 (code 151420) Convert from integer to floating point.
NLZ on 32-bit floating point CPUs
The ND-100/110 can have a 48-bit floating point CPU (standard configuration) or a 32-bit floating point CPU (customer option). For 32-bit floating point operations NLZ works as described above, except that the T register is not affected. This can also be used to test for 48-bit vs. 32-bit CPUs. The method is described in Norsk Data Document ND–06.029.01 ND-110 Instruction Set [1] p.72:
SAT 0 % Set T register to zero (INSTRUCTION-B test program uses 'COPY 0 DT') SAA 1 % Set A register bit one NLZ 16 % Normalize with scaling factor 16 decimal % Test if T is changed (non-zero). If so, the CPU is 48-bit, otherwise it is 32-bit.
References
- ↑ Norsk Data Document ND–06.029.01 ND-110 Instruction Set
- Norsk Data Document ND–06.014.02 ND-100 REFERENCE MANUAL pages 120, 144, 146 and 240
- Norsk Data Document ND–06.029.01 ND-110 Instruction Set page 70 and 72