IOXT: Difference between revisions
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{{InstructionBox | |||
|Mnemonic=IOXT | |||
|Description=Exchange information between<br>I/O system and A register. | |||
|Format=IOXT | |||
|Code=164 000 | |||
|Affected=A (''see description'') | |||
|Type=''See description'' | |||
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]] | |||
}} | |||
'''IOXT''' instruction is used for programmed IO. IOXT is a [[privileged instruction]] in normal cases but if there is no OS running and the paging system is turned off then IOXT is an unprivileged instruction. | '''IOXT''' instruction is used for programmed IO. IOXT is a [[privileged instruction]] in normal cases but if there is no OS running and the paging system is turned off then IOXT is an unprivileged instruction. | ||
[[IOX]] and IOXT are the only instructions used to communicate with external devices. | [[IOX]] and IOXT are the only instructions used to communicate with external devices. | ||
IOXT transfers data between a device I/O register and the | IOXT transfers data between a device I/O register and the CPUs [[A register]]. | ||
The [[T register]] is used as IO address. If bit 0 of the T register is zero then IOXT reads the value from the IO register into register A. If bit 0 is one then IOXT writes the contents of register A to the IO register. | The [[T register]] is used as IO address. If bit 0 of the T register is zero then IOXT reads the value from the IO register into register A. If bit 0 is one then IOXT writes the contents of register A to the IO register. | ||
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This means that all I/O device registers which need to be loaded from the CPU A register are assigned and odd device register address. Similarly I/O device input registers are assigned even addresses. | This means that all I/O device registers which need to be loaded from the CPU A register are assigned and odd device register address. Similarly I/O device input registers are assigned even addresses. | ||
== Address range == | |||
The IOXT instruction uses the 16-bit [[T register]] to hold the device-register address, and, in theory, can address 64 K register addresses (0 - 177777 octal). Only some of these addresses are legal, however. | |||
The address range from 4000 - 77777 (octal) is illegal and an attempt to perform an IOXT instruction in this address range will cause an [[IOX interrupt]]. | |||
Addresses from 100000 - 100777 (octal) are used to specify system control registers which have to be accessed via the [[ND-100 Bus]]. An example is the [[Error Correction Control Register]] ([[ECCR]]), physically located on the memory modules. ECCR is loaded by the [[TRR]] instruction. However, since ECCR is accessed via the ND-100 bus, the microprogram performs the equivalent of an IOXT instruction to address 100115 (octal). | |||
Addresses from 101000 - 137777 (octal) are reserved by Norsk Data for future needs. | |||
Addresses from 140000 - 177777 (octal) are reserved by Norsk Data for future extension of the I/O device-register address range. | |||
The device-register address of the IOXT instruction overlaps in the IOX instruction's address range. | |||
== See also == | == See also == | ||
*[[Programmed IO]] | *[[Programmed IO]] | ||
Latest revision as of 08:39, 21 March 2013
| IOXT | |
|---|---|
| Description | Exchange information between I/O system and A register. |
| Format | IOXT |
| Code | 164 0008 |
| Affected | A (see description) |
| Type | See description |
| Architecture | ND-100, ND-110 |
IOXT instruction is used for programmed IO. IOXT is a privileged instruction in normal cases but if there is no OS running and the paging system is turned off then IOXT is an unprivileged instruction.
IOX and IOXT are the only instructions used to communicate with external devices.
IOXT transfers data between a device I/O register and the CPUs A register.
The T register is used as IO address. If bit 0 of the T register is zero then IOXT reads the value from the IO register into register A. If bit 0 is one then IOXT writes the contents of register A to the IO register.
Addressing of a non existing device results in a IOX error.
Direction of transfer
The actual transfer direction of the IOX and IOXT instructions is decoded from the device-register address, based on the following convention: the transfer direction is input (from device to CPU) if the device-register address is even.
This means that all I/O device registers which need to be loaded from the CPU A register are assigned and odd device register address. Similarly I/O device input registers are assigned even addresses.
Address range
The IOXT instruction uses the 16-bit T register to hold the device-register address, and, in theory, can address 64 K register addresses (0 - 177777 octal). Only some of these addresses are legal, however.
The address range from 4000 - 77777 (octal) is illegal and an attempt to perform an IOXT instruction in this address range will cause an IOX interrupt.
Addresses from 100000 - 100777 (octal) are used to specify system control registers which have to be accessed via the ND-100 Bus. An example is the Error Correction Control Register (ECCR), physically located on the memory modules. ECCR is loaded by the TRR instruction. However, since ECCR is accessed via the ND-100 bus, the microprogram performs the equivalent of an IOXT instruction to address 100115 (octal).
Addresses from 101000 - 137777 (octal) are reserved by Norsk Data for future needs.
Addresses from 140000 - 177777 (octal) are reserved by Norsk Data for future extension of the I/O device-register address range.
The device-register address of the IOXT instruction overlaps in the IOX instruction's address range.
See also
References
- Norsk Data Document ND–06.015 ND-100 FUNCTIONAL DESCRIPTION (Programmed I/O, chapter 6.3)
- Norsk Data Document ND–06.026.1 ND-110 Functional Description (The Input/Output Instructions IOX and IOXT, page 141)