ND-100 Status Flags - Revision history

TArntsen: Change header levels for improved readability (easier separation between flag bits and details)

2016-05-27T08:21:08Z

Change header levels for improved readability (easier separation between flag bits and details)

← Older revision		Revision as of 08:21, 27 May 2016
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	The ND-100 status register (STS) bits		The ND-100 '''status register''' ('''''STS''''') bits

	=== Page Table Modus ===		== Page Table Modus ==

	Bit 0: '''PTM''', Page Table Mode		Bit 0: '''PTM''', Page Table Mode

	=== Rounding Indicator ===		== Rounding Indicator ==

	Bit 1: '''TG''', rounding indicator for floating point operations		Bit 1: '''TG''', rounding indicator for floating point operations

	=== One Bit Accumulator ===		== One Bit Accumulator ==

	Bit 2: '''K''', one bit accumulator		Bit 2: '''K''', one bit accumulator

	=== Error Indicator ===		== Error Indicator ==

	Bit 3: '''Z''', error indicator		Bit 3: '''Z''', error indicator

	=== Dynamic Overflow Indicator ===		== Dynamic Overflow Indicator ==

	Bit 4: '''Q'''', dynamic overflow indicator		Bit 4: '''Q'''', dynamic overflow indicator

	=== Static overflow Indicator ===		== Static overflow Indicator ==

	Bit 5: '''O''', static overflow indicator		Bit 5: '''O''', static overflow indicator

	=== Carry Indicator ===		== Carry Indicator ==

	Bit 6: '''C''', carry indicator		Bit 6: '''C''', carry indicator
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	The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always sets carry (the ND-500 TEST instruction is an "N minus 0" operation, i.e. test against zero).		The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always sets carry (the ND-500 TEST instruction is an "N minus 0" operation, i.e. test against zero).

	=== Multi-shift Link Indicator ===		== Multi-shift Link Indicator ==

	Bit 7: '''M''', multi-shift link indicator		Bit 7: '''M''', multi-shift link indicator

	=== Program Level Indicator ===		== Program Level Indicator ==

	Bits 8-11: '''PL''', program level indicator		Bits 8-11: '''PL''', program level indicator

	=== N-100 ===		== N-100 ==

	Bit 12: '''N-100''', ND-100 indicator		Bit 12: '''N-100''', ND-100 indicator

	=== Extended Address Mode ===		== Extended Address Mode ==

	Bit 13: '''SEXI''', extended address mode indicator		Bit 13: '''SEXI''', extended address mode indicator

	=== Memory Management On Indicator ===		== Memory Management On Indicator ==

	Bit 14: '''PONI''', memory management on indicator		Bit 14: '''PONI''', memory management on indicator

	=== Interrupt System On Indicator ===		== Interrupt System On Indicator ==

	Bit 15: '''IONI''', interrupt system on indicator		Bit 15: '''IONI''', interrupt system on indicator

TArntsen: Example 3: Describe what TEST actually does.

2011-04-30T13:40:35Z

Example 3: Describe what TEST actually does.

← Older revision		Revision as of 13:40, 30 April 2011
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	The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.		The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.

	The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always sets carry.		The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always sets carry (the ND-500 TEST instruction is an "N minus 0" operation, i.e. test against zero).

	=== Multi-shift Link Indicator ===		=== Multi-shift Link Indicator ===

TArntsen: Typo: set->sets

2011-04-13T09:59:13Z

Typo: set->sets

← Older revision		Revision as of 09:59, 13 April 2011
Line 73:		Line 73:
	The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.		The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.

	The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always ~~set~~ carry.		The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always sets carry.

	=== Multi-shift Link Indicator ===		=== Multi-shift Link Indicator ===

TArntsen: Clarify ND-500

2010-07-31T14:08:36Z

Clarify ND-500

← Older revision		Revision as of 14:08, 31 July 2010
Line 73:		Line 73:
	The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.		The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.

	The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way, as can be seen explicitly by its TEST instruction which always set carry.		The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way as the Nord-10/ND-100, as can be seen explicitly by its TEST instruction which always set carry.

	=== Multi-shift Link Indicator ===		=== Multi-shift Link Indicator ===

TArntsen: First stab at status register bits explained

2010-07-31T13:59:47Z

First stab at status register bits explained

New page

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The ND-100 status register (STS) bits

=== Page Table Modus ===

Bit 0: '''PTM''', Page Table Mode

=== Rounding Indicator ===

Bit 1: '''TG''', rounding indicator for floating point operations

=== One Bit Accumulator ===

Bit 2: '''K''', one bit accumulator

=== Error Indicator ===

Bit 3: '''Z''', error indicator

=== Dynamic Overflow Indicator ===

Bit 4: '''Q'''', dynamic overflow indicator

=== Static overflow Indicator ===

Bit 5: '''O''', static overflow indicator

=== Carry Indicator ===

Bit 6: '''C''', carry indicator

The carry indicator is set/reset by add/subtract instructions like [[ADD]], [[SUB]], [[RADD]], [[RSUB]], [[AAA]], [[AAX]], [[AAT]], [[AAB]], but also by [[RMPY]] and [[RDIV]]. It is both set/reset and used by add with carry, RADD ADC.

How the carry flag is set on addition is [[Wikipedia:Carry_flag|well defined]], but there are different ways of setting carry on subtraction. Norsk Data uses a method which can most easily be explained as follows: All addition and subtraction is done by a three-way adder, and the carry flag is set if a carry occurs from the sign bit position of the adder.

====Example 1:====
Addition (using a 4-bit word for simplicity): Add 4 and 1:
0100
0001
0
-----
0101
Carry not set.

====Example 2:====
Add 12 and 5:
1100
0101
0
-----
10001
Carry set.

====Example 3:====
Subtraction: One common method for subtracting binary values is to add the first value to the [[Wikipedia:Two's_complement|two's complement]] of the second value. Norsk Data instead performs subtraction by adding the first value to the one's complement of the second value, plus one:

Subtract 0 from 4:
0100
1111
1
-----
10100
Carry set.

The answer is thus 4, as expected, and carry flag set. This gives a different result than if subtraction had been done via two's complement addition:
0100
0000
-----
0100
Carry not set (this is not the ND method).

The three-way Norsk Data adder can be managed explicity with the RADD instruction, which has modifiers like AD1 (add one), or ADC (add carry), and CM (One's complement). AD1 and ADC cannot be used at the same time, either one of them can set the single bit third operand of the adder.

The carry flag as set by ND on subtraction is exactly inverted compared to how the carry flag is set on Intel x86 by its 'sub' instructions. 1-0 sets carry on ND but resets it on x86. The ND-500 carry flag behaves the same way, as can be seen explicitly by its TEST instruction which always set carry.

=== Multi-shift Link Indicator ===

Bit 7: '''M''', multi-shift link indicator

=== Program Level Indicator ===

Bits 8-11: '''PL''', program level indicator

=== N-100 ===

Bit 12: '''N-100''', ND-100 indicator

=== Extended Address Mode ===

Bit 13: '''SEXI''', extended address mode indicator

=== Memory Management On Indicator ===

Bit 14: '''PONI''', memory management on indicator

=== Interrupt System On Indicator ===

Bit 15: '''IONI''', interrupt system on indicator

== References ==
*{{ND-doc|06.014.02}}
*{{ND-doc|06.029.01}}
*{{ND-doc|05.009.3}}

[[Category:ND-100 instructions]]