View source for BFILL

{{InstructionBox
|Mnemonic=BFILL
|Description=Byte fill
|Format=BFILL
|Code=140&nbsp;130
|Affected=P,X,T, memory region defined by X,T
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]]
}}

'''BFILL''' is an assembly instruction. A byte operand memory area defined by the [[X register|X]] and [[T register|T registers]] is filled with the value of the right-most byte in the [[A register]].

The [[P register]] is incremented by two when this instruction is finished, i.e. any instruction directly following BFILL will not be executed.

The A, X and T registers should be set to appropriate values before execution of BFILL.  The X and T registers will also be modified by the instruction.

;Before execution:
 A: Bit 0-7:  The value to fill into each byte of the destination field.
 X: Bit 0-15: The destination field's word address in memory.
 T: Bit 15:   This bit specifies whether the byte operand starts 
              in the left byte or right byte of the address defined by X.
              Bit 15 = 0, left byte
              Bit 15 = 1, right byte
    Bit 14:   Page table mode: Bit 14 = 1 selects the alternative page table.
    Bit 13:   This bit should be 0.
    Bit 12:   Not used.
    Bit 11-0: Field length in number of bytes (0-4095).
;After execution
 X: Bit 0-15: The word address of the byte following the last byte.
 T: Bit 15:   This bit specifies whether the byte following the last byte is
              in the left byte or right byte of the address defined by X.
    Bit 11-0: Set to zero.

===Example 1===
 Memory area before execution, each address holds 2 bytes (1 word):
 Address: 0  0 0
          1  0 0
          2  0 0
          3  0 0
 A register = 1
 X register = 1
 T register = 0x0003 (bit 15 = 0, length field = 3)

 Memory area after execution:
 Address: 0  0 0
          1  1 1
          2  1 0
          3  0 0
 X register = 2
 T register = 0x8000 (bit 15 = 1)
 P:= P+2

===Example 2===
 Memory area before execution, each address holds 2 bytes (1 word), work on alternative page table:
 Address: 0  0 0
          1  0 0
          2  0 0
          3  0 0
 A register = 1
 X register = 1
 T register = 0xC003 (bit 15 = 1 (right byte), bit 14 = 1 (use APT), length field = 3)

 Memory area after execution:
 Address: 0  0 0
          1  0 1
          2  1 1
          3  0 0
 X register = 3
 T register = 0x4000 (bit 15 = 0)
 P:= P+2

== References ==
*{{ND-doc|06.014.02|Pages 3-27,3-28}}
*{{ND-doc|06.029.01|Pages 92-93}}
The older document is more accurate for this instruction.

[[Category:ND-100 instructions]]