https://www.ndwiki.org/index.php?action=history&feed=atom&title=FDVFDV - Revision history2026-07-14T09:20:53ZRevision history for this page on the wikiMediaWiki 1.43.8https://www.ndwiki.org/index.php?title=FDV&diff=1439&oldid=prevTArntsen: FDV instruction2010-07-01T09:53:50Z<p>FDV instruction</p>
<p><b>New page</b></p><div>{{InstructionBox<br />
|Mnemonic=FDV<br />
|Description=Divide floating accumulator<br />
|Format=FDV ''<[[ND-100 addressing modes|addr. mode]]> <[[displacement|disp.]]>''<br />
|Code=114&nbsp;000<br />
|Affected=T A D, Z, TG<br />
|Architecture=[[ND-100]], [[ND-110 CPU|ND-110]]<br />
}}<br />
<br />
'''FDV''' is an assembly instruction. The contents of the [[floating accumulator]] is divided by the floating word in the [[effective address]] and the following one or two locations, with the result in the floating accumulator (T A D).<br />
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If division by zero is attempted the error indicator '''Z''' is set to one.<br />
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On 32-bit floating point hardware only registers '''A''' and '''D''' are used, and two address locations instead of three (ea and ea+1).<br />
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== Flags affected ==<br />
The [[rounding indicator]] for floating point operations ('''TG''', sometimes called just '''G''') may be set by this instruction.<br><br />
The [[error indicator]] ('''Z''') is set if division by zero is attempted. The flag may be tested by a following [[BSKP]] instruction.<br />
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== References ==<br />
*{{ND-doc|06.014.02|Page 3-23}}<br />
*{{ND-doc|06.029.01|Pages 69 and 72}}<br />
[[Category:ND-100 instructions]]</div>TArntsen